0707070000020352141006440015130777760000010417470566622256600000500000000004Size192 0707070000020352151006440015130777760000010210140566611704700000500000000057NameZ85230 Enhanced Combo Card Driver version 1.16 0707070000020352171007550015130777760000011746250566621614300001000000003261Install: # Installation script for the Z85230 Combo Card Driver Charles Green # Install z85230.o driver if there is an existing cmb.o echo "Have you performed a full system backup? (y/n) \c" read line if [ $line != y ] then echo "You should perform a full backup before installing this package." exit 64 fi if fgrep -x cmb /dev/null then echo "Installing Z85230 driver...\c" mv z85230.o /etc/lddrv mv /etc/lddrv/drivers /etc/lddrv/drivers~escc sed "s/^cmb$/z85230/" /etc/lddrv/drivers echo "\nReplacing 'master' file entry for z85230 driver...\c" masterupd -d z85230 masterupd -ap escc char init release open close read write ioctl z85230 major=`masterupd -c z85230` echo "\nCreating special files for major device number $major...\c" for card in 0 1 2 3 4 5 6 7 do for chan in 0 1 do mknod /dev/ttyz$card$chan c $major \ `expr $card \* 2 + 1 - $chan` done done if [ ! -d /usr/local/src ] then if [ ! -d /usr/local ] then echo "\nCreating /usr/local/...\c" mkdir /usr/local fi echo "\nCreating /usr/local/src/...\c" mkdir /usr/local/src fi echo "\nMoving source code to /usr/local/src/...\c" mv z85230.c escc.h makefile.escc /usr/local/src echo else echo "No existing combo card driver - exiting" exit 64 fi mv Readme.Escc /u/install/Filecabinet message -i "The Readme.Escc file is saved in the 'Filecabinet of Install'\n\n\tHit Enter to continue" message -i "You must replace references to tty0nn with ttyzNN as appropriate for your installation.\n\n\tHit Enter to continue" message -i "Installation is complete, but you must do a \"shutdown\" in order to bring the software into service.\n\n\tHit Enter to continue" 0707070000020352201007550015130777760000011744660566621656500000700000001013Remove # Remove script for Z85230 Combo Card Driver Charles Green echo "Removing Z85230 Combo Card Driver" rm /dev/ttyz?? masterupd -d z85230 rm /etc/lddrv/z85230.o /usr/local/src/z85230.c /usr/local/src/escc.h \ /usr/local/src/makefile.escc /u/install/Filecabinet/Readme.Escc mv /etc/lddrv/drivers /etc/lddrv/drivers.z85230 sed "s/^z85230$/cmb/" /etc/lddrv/drivers message -i "Replace instances of /dev/ttyzNN with /dev/tty0nn as appropriate for your installation.\n\n\nPress Enter to continue." 0707070000020000251006440015130777760000010016700566611654100000600000000144FilesSize Name Install Remove Files MAKEcpio MAKEflop z85230.c escc.h z85230.o makefile.escc Readme.Escc 0707070000020007761007770015130777760000011507130566611160000001100000000045MAKEcpiocat Files | cpio -ocBv > ESCCOMBO+IN 0707070000020017451007770015130777760000010742020566611154000001100000000044MAKEflopcat Files | cpio -ocBv > /dev/fp021 0707070000020020301004440015130777760000011107470566611172200001100000061033z85230.c/* {([ z85230.c 1.16 - 11/25/94 00:01:02 * z85230.c - Loadable device driver for UNIXpc combo cards with * the Z85230 Enhanced Serial Communications Controller in place * of the stock Z8530 SCC. * Charles Green * * References: * AT&T UNIXpc UNIX System V User's Manual * AT&T UNIXpc Reference Manual * Zilog Z85230 Technical Manual * Zilog ESCC Application Note * uipc pty.c Jens-Uwe Mager / Eric H. Herrin II * * Random UNIXpc facts: * * There appear to be at least *three* varieties of combo card out there: * One is described in the Reference Manual, with schematics (Rev G, showing * a single oscillator circuit driving PCLK and RTxCA,B at 2.4576MHz) which * do not match the two physical cards I have seen: handwritten revs of * E and F, and two 2.4576MHz crystals, one between each channel's * RTxC and SYNC pins. * * The two rev 'F' boards I've seen have a Monolithic Memories Inc * MMI chip at location 11H, in place of the 82S123. * * R9 and R10 on the rev E and F combo cards (100K ohm) are not part of * Zilog's recommended oscillator circuit, and the Z85230 produces * truly bizarre baud rates if they are not removed. * * I have yet to get the 'E' rev board and Z85230 to work with this driver; * running it with the stock driver and patched 'expserspdtbl' results in * different baud rates when it works at all. This driver has been developed * with an 'F' rev board. */ static char Sccsid[] = "@(#)z85230.c 1.16 11/25/94 Charles Green"; #include "escc.h" /* #define eprintf printf */ int spl6(), timeout(), untimeout(); void splx(), sleep(), wakeup(), eprintf(), set_int(), clr_int(), ttiocom(), ttinit(), printf(), signal(), ttyflush(); #ifdef WAIT4PCLK static wait4pclk() { short i; for (i=0; i<16; i++) ; } #else WAIT4PCLK #define wait4pclk() #endif WAIT4PCLK static struct tty cmb_tty[MAXCMB][NCHANS]; static scc_ctl scc[MAXCMB]; static ncards; /* Set by esccinit: How many cards we found */ /* NOTE: WRITEREG and READREG must be protected by SPL_CMB. */ #ifdef DEFREG #define WRITEREG0(cmdadr, val) (*(cmdadr) = (val)) #define WRITEREG(cmdadr, n, val) (*(cmdadr) = (n), *(cmdadr) = (val)) #define READREG0(cmdadr) (*(cmdadr)) #define READREG(cmdadr, n) (*(cmdadr) = (n), *(cmdadr)) #else DEFREG /* NOTE: Optimized compiles generate code that attempts to * change the ESCC registers faster than allowed, so we slow * things down a bit by using subroutine calls. */ void WRITEREG0(cmdadr, val) vbyte *cmdadr; int val; { *cmdadr=val; } void WRITEREG(cmdadr, n, val) vbyte *cmdadr; int n, val; { WRITEREG0(cmdadr, n); *cmdadr=val; } int READREG0(cmdadr) vbyte *cmdadr; { return(*cmdadr); } int READREG(cmdadr, n) vbyte *cmdadr; { WRITEREG0(cmdadr, n); return(*cmdadr); } #endif DEFREG /* * Poke the hardware. * Make sure it will interrupt us when it's done? */ static void esccstart(tp) struct tty *tp; { eprintf("HELLO from esccstart()!\n"); } static ushort txfifosz[3] = {1, 4, 4}; /* '30 '130 '230 Transmit FIFO sizes */ static char shadow[MAXCMB][NCHANS][16]; /* Write register contents */ static int esccproc(tp, cmd) struct tty *tp; int cmd; { short card = tp->t_mindev >> 1, /* Which combo card */ chan = tp->t_mindev & 1; /* B or A channel of chip */ short n; int pl; /* Prior processor level */ struct ccblock *tbuf; vbyte *fifoptr, *regptr; /* eprintf("esccproc: "); */ regptr = &scc[card].addr->ctl[chan].reg; switch(cmd) { /* * Open seems to generate T_INPUT, * close generates T_RESUME and T_RFLUSH. * Write generates T_OUTPUT. */ case T_SUSPEND: tp->t_state |= TTSTOP; /* From pty.c */ break; case T_RESUME: tp->t_state &= ~TTSTOP; /* From pty.c */ /* eprintf("T_RESUME, not "); */ /* fallthru */ case T_OUTPUT: /* eprintf("T_OUTPUT: "); */ if (tp->t_state & (TTSTOP|TIMEOUT)) /* pty.c */ break; tbuf = &tp->t_tbuf; pl = SPL_CMB(); if (tbuf->c_ptr == NULL || tbuf->c_count == 0) { /* I don't understand this condition... from pty.c */ if (tbuf->c_ptr) { /* eprintf("zero count!? "); */ tbuf->c_ptr -= tbuf->c_size; } if (!((*linesw[(short)tp->t_line].l_output)(tp) & CPRES)) { /* eprintf("not CPRES - bye\n"); */ WRITEREG0(regptr, WR0_RTI); /* Reset Tx Int */ splx(pl); break; } /* eprintf("CPRES!\n"); */ } /* else */ if (!(tp->t_state & BUSY)) { /* Work to do */ fifoptr= &scc[card].addr->dat[chan].reg; n = min(tbuf->c_count, txfifosz[scc[card].type]); if (n) { /* eprintf("Poking %d\n", n); */ tbuf->c_count -= n; tp->t_state |= BUSY; scc[card].txinttim[chan] = 0; while (n--) *fifoptr= *tbuf->c_ptr++; } } /* else eprintf("Busy\n"); */ splx(pl); break; case T_INPUT: /* * I guess we could insure that receive interrupts * are enabled here, if it were necessary... */ /* eprintf("T_INPUT\n"); */ break; case T_WFLUSH: /* eprintf("T_WFLUSH\n"); */ break; case T_RFLUSH: /* eprintf("T_RFLUSH\n"); */ break; case T_BLOCK: /* printf("T_BLOCK\n"); */ tp->t_state &= ~TTXON; tp->t_state |= (TBLOCK | TTXOFF); /* If HFC, drop RTS */ if (shadow[card][chan][15] & WR15_CTS) { shadow[card][chan][5] &= ~WR5_RTS; pl=SPL_CMB(); WRITEREG(regptr, 5, shadow[card][chan][5]); splx(pl); } break; case T_UNBLOCK: /* printf("T_UNBLOCK\n"); */ tp->t_state &= ~(TBLOCK | TTXOFF); tp->t_state |= TTXON; /* If HFC, raise RTS */ if (shadow[card][chan][15] & WR15_CTS) { shadow[card][chan][5] |= WR5_RTS; pl=SPL_CMB(); WRITEREG(regptr, 5, shadow[card][chan][5]); splx(pl); } break; default: eprintf("esccproc(0x%x)\n", cmd); } return(0); /* NEED ??? WHAT SHOULD WE RETURN? */ } /* end esccproc() */ static short nopoll; int esccint() { struct tty *tp; scc_ctl *sccptr = scc; regis *ctlptr; /* Pointer to control registers */ /*cwg register */ vbyte *regptr; /* Pointer to channel's control byte */ register vbyte *fifoptr; /* Pointer to channel's data byte */ register struct ccblock *rbufptr; short done=0; register char *rptr; /* To preserve t_rbuf.c_ptr */ short i; short card=0, /* Which combo card */ chan, /* B or A channel of chip */ newrr0, newrr1, rr0diff, serviced = 0, ext_svc, status; /* eprintf("esccint() "); */ do { /* * We loop, starting here, until status * doesn't indicate an interrupt condition. */ ctlptr = sccptr->addr->ctl; do { /* We sometimes hang non-reproducibly for no known reason */ if (++nopoll > 16384) { printf("Watchdog reset, status2 0x%x\n", status); shadow[card][0][9] = WR9_FHR; WRITEREG(&ctlptr->reg, 9, WR9_FHR); /* Force Reset */ scc[card].addr->reset[0].reg = 0; nopoll = 0; } status=READREG(&ctlptr->reg, 2); /* B has stat w/vect */ /* eprintf("status 0x%x ", status); */ /* chan = (status & RR2_CHAN) ? A : B; */ chan = (status & RR2_CHAN) >> 3; regptr = &(ctlptr+chan)->reg; /* eprintf(chan ? "A " : "B "); */ tp = cmb_tty[card] + chan; /* eprintf("card %d RR2B 0x%x ", card, status); */ switch (status & RR2_STAT) { case RR2_SRC: /* Special Rcv Cnd (no further int pend) */ /* printf("Special Rx:\n"); */ newrr1 = READREG(regptr, 1); if ((newrr1 & RR1_ASY) == 0) { done=1; /* No further interrupt */ break; } else { if (newrr1 & RR1_FRM) eprintf("RR2_SRC: Framing Error\n"); else if (newrr1 & RR1_OVR) { /* Blathering will only make it worse. * eprintf("RR2_SRC: Overrun Error\n"); */ sccptr->overruns[chan]++; WRITEREG0(regptr, WR0_RER); } else eprintf("0x%x=RR1\n", newrr1); } /* FALLTHROUGH to receive broken? character */ case RR2_RX: /* Receive data available */ /* eprintf("esccint(RR2_RX): "); */ fifoptr= &sccptr->addr->dat[chan].reg; if ((rbufptr= &tp->t_rbuf)->c_ptr == NULL) { /* We *do* get here sometimes */ eprintf("EEK! No t_rbuf!?\n"); /* We should probably apply flow control here */ while (*regptr & RR0_RCA) i = *fifoptr; } else { rptr=rbufptr->c_ptr +rbufptr->c_size -rbufptr->c_count; while (*regptr & RR0_RCA) { *rptr++ = *fifoptr; if (--rbufptr->c_count == 4) break; if (!rbufptr->c_count) { (*linesw[(short)tp->t_line].l_input)(tp); if (rbufptr->c_ptr == NULL) { eprintf("EEK!! No t_rbuf!?\n"); break; } rptr=rbufptr->c_ptr +rbufptr->c_size -rbufptr->c_count; } } /* End "till no more input" */ /* eprintf("Got %d in\n", i); */ /* t_rbuf is 64 characters, * so anything above 4800bps can fill it * in 1/10 sec */ } serviced = 1; sccptr->busy[chan]++; break; case RR2_TX: /* Transmit buffer empty */ /* eprintf("esccint(RR2_TX)\n"); */ serviced = 1; if (tp->t_state & TTSTOP) /* Output suspended? */ WRITEREG0(regptr, WR0_RTI); if (tp->t_state & OASLP) /* Waiter? */ wakeup(&tp->t_outq); tp->t_state &= ~BUSY; /* Output done */ esccproc(tp, T_OUTPUT); /* Restart it */ break; case RR2_EXT: /* External/Status Change */ /* eprintf("Ext/Stat "); */ serviced = 1; ext_svc = 0; /* We don't know why yet */ newrr0 = READREG0(regptr); rr0diff = newrr0 ^ sccptr->rr0[chan]; /* * There could be multiple state changes. * Note: It is normal for 'rr0diff' to start * out as 0x44. */ if (rr0diff & RR0_DCD) { /* DCD change */ ext_svc = 1; if (newrr0 & RR0_DCD) { /* Now on */ tp->t_state |= CARR_ON; /* eprintf("DCD now hi\n"); */ if (tp->t_state & WOPEN) wakeup(&tp->t_rawq); } else { tp->t_state &= ~CARR_ON; /* eprintf("DCD now lo\n"); */ if (tp->t_state & ISOPEN) { signal(tp->t_pgrp, SIGHUP); ttyflush(tp, FREAD|FWRITE); } } } /* End "if DCD change" */ /* ADD: CTS */ if (rr0diff & RR0_CTS) { /* CTS change */ ext_svc = 1; if (newrr0 & RR0_CTS) { /* Now on */ esccproc(tp, T_RESUME); /* ??? */ } else { esccproc(tp, T_SUSPEND); /* ??? */ } } /* End "if CTS change" */ if (!ext_svc) eprintf("0x%x=rr0diff\n", rr0diff); sccptr->rr0[chan] = newrr0; WRITEREG0(regptr, WR0_RES); /* Reset Ext/Stat */ break; default: printf("unknown status 0x%x\n", status&RR2_STAT); } /* End switch on status vector */ WRITEREG0(regptr, WR0_RHI); /* Reset Highest IUS */ /* * This may be the point at which we want * to loop back. */ } while (!done); done=0; ++sccptr; } while (++card < ncards); /* End "per combo card" */ return(serviced); /* Whether it was our interrupt */ } /* end esccint() */ /* esccpoll() wakes up every 1/10 second and unloads the receive FIFOs, * and also calls l_input() until we can figure out how this happens * automagically... */ static short orbit = 1; static int pollarg; static void esccpoll(arg) int arg; { struct tty *tp; scc_ctl *sccptr = scc; regis *ctlptr; /* Pointer to control registers */ vbyte *regptr; /* Pointer to channel's control byte */ vbyte *fifoptr; /* Pointer to channel's data byte */ register struct ccblock *rbufptr; char *rptr; /* To preserve t_rbuf.c_ptr */ short card, /* Which combo card */ pl, /* Processor level for critical section */ chan, /* B or A channel of chip */ i; nopoll = 0; /* Watchdog */ if (orbit > 0) { for (card=0; cardaddr->ctl; for (chan=0; chanbusy[chan])) { tp = cmb_tty[card] + chan; if (tp->t_state & ISOPEN) { if ((tp->t_state & BUSY) && (++scc[card].txinttim[chan] > 60)) { ++scc[card].txmisint[chan]; /* Pretend we got a transmit interrupt */ pl = SPL_CMB(); if (tp->t_state & OASLP) /* Waiter? */ wakeup(&tp->t_outq); tp->t_state &= ~BUSY; /* Output done */ esccproc(tp, T_OUTPUT); /* Restart it */ splx(pl); } regptr = &(ctlptr+chan)->reg; fifoptr= &sccptr->addr->dat[chan].reg; pl = SPL_CMB(); if ((rbufptr= &tp->t_rbuf)->c_ptr != NULL) { rptr=rbufptr->c_ptr +rbufptr->c_size -rbufptr->c_count; for (i=0; (*regptr & RR0_RCA) && rbufptr->c_count--; i++) { *rptr++ = *fifoptr; } } /* End "if doable" */ /* NOTE: I thought that t_rbuf was supposed to * be emptied automagically every 1/15th second * by a timer routine!?!? */ (*linesw[(short)tp->t_line].l_input)(tp); splx(pl); } /* End "if open" */ } /* End "if no receive interrupt lately " */ sccptr->busy[chan] = 0; } /* End "per channel" */ ++sccptr; } /* End "per card" */ pollarg = timeout(esccpoll, arg+1, HZ/10); } else orbit = 0; } /* end esccpoll() */ static struct drv_int cmb_int = {0, esccint}; void esccinit() { short slot; short j; int pl; vbyte *regptr; /* We could use getslot() to find combo cards, * but I suspect it only tells us where the first one is... * * i = getslot(CMB_ID); * eprintf("0x%x=getslot()\n", slot); */ ncards = 0; for (slot=0; slot> 8)) { /* eprintf("z85230: Found combo %d in slot %d: ", ncards, slot); */ scc[ncards].addr = (combo *)EXP_ADR(slot); /* eprintf("rom 0x%x 0x%x 0x%x 0x%x\n", scc[ncards].addr->reset[0].reg, scc[ncards].addr->reset[1].reg, scc[ncards].addr->reset[2].reg, scc[ncards].addr->reset[3].reg); */ regptr = &scc[ncards].addr->ctl[0].reg; /* * Enable crystal (disable extern sync signal) */ scc[ncards].addr->latchwr[0].reg = 0xff; /* * Decide which Z85*30 we have. * If WR15 bit 0 is set, RR15 bit 0 set * tells us this is an ESCC, since this * bit is unused in the SCC and the Z8530 * will report it as 0. */ pl=SPL_CMB(); shadow[ncards][0][9] = WR9_FHR; WRITEREG(regptr, 9, WR9_FHR); /* Force Reset */ splx(pl); scc[ncards].addr->reset[0].reg = 0; /* Extra delay here after above reset */ wait4pclk(); pl=SPL_CMB(); shadow[ncards][0][15] = WR15_W7P; WRITEREG(regptr, 15, WR15_W7P); /* Enable 7' */ j = READREG(regptr, 15); splx(pl); if (j == WR15_W7P) { /* eprintf("ESCC detected: "); */ /* * Never seen a '130, but the ESCC * Application Note says this is * apparently how you differentiate * them. I guess the '230 resets to * a default transmit interrupt of * FIFO empty, rather than the '130's * default of FIFO not full. */ pl=SPL_CMB(); shadow[ncards][0][7] = WR7P_ERE; WRITEREG(regptr, 7, WR7P_ERE); /* Extend Rd */ j=READREG(regptr, 14); splx(pl); if (j == 0x00) { eprintf("card %d: Z85130\n", ncards); scc[ncards].type = Z85130; } else if (j == 0x40) { eprintf("card %d: Z85230\n", ncards); scc[ncards].type = Z85230; } else eprintf("esccinit: card %d: 0x%x=Unknown_RR14\n", ncards, j); } else if (j == 0) { eprintf("card %d: SCC detected: Z8530\n", ncards); scc[ncards].type = Z8530; } else eprintf("card %d: 0x%x Unknown RR15\n", ncards, j); ++ncards; } /* End "per slot with combo card in it */ if (!ncards) u.u_error = ENODEV; /* Nothing for us to do! */ else { set_int(&cmb_int, CMB_INT); /* Install interrupt handler */ esccpoll(0); /* Start satellite */ } } /* End esccinit() */ void esccrelease() { short card, chan; orbit = -1; /* Tell esccpoll() to quit */ card=untimeout(pollarg); /* VARIABLEABUSE */ /* eprintf("%d=untimeout(%d)\n", card, pollarg); */ for (card=0; card < ncards*2; card++) for (chan=0; chant_mindev; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ regptr= &scc[card].addr->ctl[chan].reg; /* * Set parity and stop bits. * Tech manual says to write 4 before 1, 3, 6, 7. * We can get this as RR4 to keep fields unchanged. * But it looks like we change them all anyway. */ WRITEREG(regptr, 4, WR4_X16 | WR4_ASY | ((tp->t_cflag & CSTOPB)>>3) | ((tp->t_cflag & PARENB) | (~tp->t_cflag & PARODD))>>8); /* * Set time constant for desired speed */ /* eprintf("Setting speed 0x%x => %d\n", tp->t_cflag & CBAUD, rates[tp->t_cflag & CBAUD]); */ if (tp->t_cflag & CBAUD) { WRITEREG(regptr, 12, rates[tp->t_cflag & CBAUD] & 0xff); /* "& 0xff" is superfluous... */ WRITEREG(regptr, 13, rates[tp->t_cflag & CBAUD] >> 8); } /* * Set transmitter bits/char. * NOTE At least RTS, and maybe DTR and TXE, should be undisturbed. * CLEARED by esccclose() */ shadow[card][chan][5] &= WR5_TXE | WR5_DTR | WR5_RTS; shadow[card][chan][5] |= ((tp->t_cflag & CSIZE)<<1); WRITEREG(regptr, 5, shadow[card][chan][5]); /* * Set Receiver Enable last per Tech Manual. * WR3 can be read as RR9 if we need to keep other bits. */ WRITEREG(regptr, 3, ((tp->t_cflag & CSIZE)<<2) | ((tp->t_cflag & CREAD)>>7)); } /* End setmodes() */ /* * Open the port. If includes read, turn on the receiver interrupts. * We could employ the hack of minor+128 as no-delay open... */ void esccopen(minordev, flags) dev_t minordev; /* Minor device number */ int flags; /* Read and/or write */ { struct tty *tp; int pl; /* Prior processor level */ vbyte *regptr; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ /* eprintf("Hello from esccopen(0x%x, 0%o) ", minordev, flags); */ if (card > ncards) { u.u_error = ENODEV; } else { if (!((tp = cmb_tty[card]+chan)->t_state & (ISOPEN | WOPEN))) { scc[card].overruns[chan]=0; scc[card].txmisint[chan]=0; ttinit(tp); /* Set default tty values */ tp->t_proc = esccproc; tp->t_mindev = minordev; /* * Probably good to set speed and enable receiver * before we turn on DTR... */ /* * Clocking derived from crystal and baud rate generator */ regptr= &scc[card].addr->ctl[chan].reg; pl = SPL_CMB(); WRITEREG(regptr, 11, WR11_XTL | WR11_RBR | WR11_TBR | WR11_TRC | WR11_XBR); /* * Baud rate generator enable (clock from XTAL) * NOTE: WR14_BRG makes kernel hang!?! */ WRITEREG(regptr, 14, WR14_BRE); /* * setmodes() rewrites 3, 4, 5, 12, 13. */ shadow[card][chan][5] |= WR5_TXE | WR5_DTR | WR5_RTS; setmodes(tp); /* tp->t_mindev tells us which line */ /* * Enable interrupt on DCD high * Could be optional based on FNDELAY... * We also need to be sure 7' is on */ shadow[card][chan][15] &= WR15_CTS; /* Keep hfc_ctl */ shadow[card][chan][15] |= WR15_DCD|WR15_W7P; WRITEREG(regptr, 15, shadow[card][chan][15]); /* * What we came here for: Set FIFO level on tx/rx * NOTE: RFI could be optional based on CREAD. */ WRITEREG(regptr, 7, WR7P_TFI|WR7P_RFI|WR7P_ERE); /* * Enable status, receive and transmit interrupts * NOTE: Receiver interrupts could depend on open() * CLEARED by esccclose() */ WRITEREG(regptr, 1, WR1_SIE|WR1_RIA|WR1_TIE); WRITEREG(regptr, 9, WR9_SIA | WR9_MIE); /* Master Interrupt Enable and Software Int Ack */ splx(pl); } /* * If this is not a no-delay open, wait for carrier. */ pl = SPL_CMB(); if (!(flags & FNDELAY)) { while (!(tp->t_state & CARR_ON)) { tp->t_state |= WOPEN; sleep(&tp->t_rawq, TTIPRI); } tp->t_state &= ~WOPEN; } else tp->t_state |= CARR_ON; /* cwg O_NDELAY writes */ splx(pl); if (flags & FREAD) { /* Enable receive-data interrupts */ } (*linesw[(short)tp->t_line].l_open)(tp); } } /* End esccopen() */ void esccclose(minordev, flags) dev_t minordev; /* Minor device number */ int flags; { vbyte *regptr; int pl; /* Prior processor level */ struct tty *tp; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ tp = cmb_tty[card]+chan; /* * Wait for output to drain */ pl = SPL_CMB(); while (tp->t_state & BUSY) { tp->t_state |= OASLP; sleep(&tp->t_outq, TTIPRI); } tp->t_state &= ~OASLP; /* ??? */ splx(pl); /* eprintf("esccclose()ing\n"); */ regptr= &scc[card].addr->ctl[chan].reg; /* * Turn off DTR. */ pl = SPL_CMB(); WRITEREG(regptr, 5, 0x00); /* DTR / RTS off */ WRITEREG(regptr, 3, 0x00); /* Turn off receiver */ WRITEREG(regptr, 1, 0x00); /* Status Interrupt Disable */ splx(pl); if (scc[card].overruns[chan]) eprintf("card %d chan %d ovrn %d\n", card, chan, scc[card].overruns[chan]); if (scc[card].txmisint[chan]) eprintf("card %d chan %d lost %d Tx interrupts\n", card, chan, scc[card].txmisint[chan]); (*linesw[(short)tp->t_line].l_close)(tp); /* eprintf("state after close = 0x%x\n", tp->t_state); */ /* tp->t_state &= ~(ISOPEN | WOPEN); \* Turn off open/wait */ tp->t_state &= ~(CARR_ON|WOPEN|TTXON|RTO); /* Turn off software copy of DCD and other miscellaney */ } /* End esccclose() */ void esccread(minordev) dev_t minordev; /* Minor device number */ { struct tty *tp; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ /* eprintf("Hello from esccread(0x%x)\n", minordev); */ tp = cmb_tty[card]+chan; (*linesw[(short)tp->t_line].l_read)(tp); } /* End esccread() */ void esccwrite(minordev) dev_t minordev; /* Minor device number */ { struct tty *tp; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ tp = cmb_tty[card]+chan; /* * From pty.c: */ /* eprintf("esccwrite(0x%x=state)...", tp->t_state); */ (*linesw[(short)tp->t_line].l_write)(tp); /* eprintf("...esccwrite(0x%x=state)\n", tp->t_state); */ } /* End esccwrite() */ #ifdef NEVER static setparms(tio) struct termio *tio; { } /* end setparms() */ static getparms(tio, tp) struct termio *tio; struct tty *tp; { short i; tio->c_iflag = tp->t_iflag; tio->c_oflag = tp->t_oflag; tio->c_cflag = tp->t_cflag; tio->c_lflag = tp->t_lflag; tio->c_line = tp->t_line; for (i=0; ic_cc[i] = tp->t_cc[i]; } /* end getparms() */ #endif NEVER void esccioctl(minordev, cmd, arg, flags) dev_t minordev; /* Minor device number */ int cmd, arg; int flags; { struct tty *tp; short card = minordev >> 1, /* Which combo card */ chan = minordev & 1; /* B or A channel of chip */ int pl; vbyte *regptr; /* eprintf("Hello from esccioctl(0x%x, 0x%x, 0x%x, 0x%x): ", minordev, cmd, arg, flags); */ tp = cmb_tty[card]+chan; ttiocom(tp, cmd, arg, flags); /* seems to update tp->t_* fields */ switch (cmd) { /* * STGET, TCGET, and TCSETAW are used by stty(1) */ case STGET: u.u_error = EINVAL; /* This seems appropriate... */ break; case TCGETA: /* TCGETA generated by '/bin/ls' */ case TIOCGETP: /* Into struct sgttyb, please... */ /* getparms(arg, cmb_tty[card]+chan); */ break; case TCSETA: /* Set immediate */ pl = SPL_CMB(); setmodes(tp); /* tp->t_mindev tells us which line */ splx(pl); break; case TCSETAW: /* Wait for output to drain, then set */ /* ADD: Wait for output to drain */ pl = SPL_CMB(); setmodes(tp); /* tp->t_mindev tells us which line */ splx(pl); break; case TCSETAF: /* Drain output, then flush input & set */ /* ADD: Wait for output to drain */ /* ADD: Flush input */ pl = SPL_CMB(); setmodes(tp); /* tp->t_mindev tells us which line */ splx(pl); break; case TCXONC: /* TCXONC generated by 'ksh -ao vi' */ /* NEED: code here */ break; case LDSETT: /* Line Discipline? Generated by 'uugetty' */ /* eprintf("LDSETT arg %d\n", arg); */ break; case TCHFCCTL: /* Hardware Flow Control Control!? */ /* eprintf("HFC arg %d\n", arg); */ if (arg) shadow[card][chan][15] |= WR15_CTS; else shadow[card][chan][15] &= ~WR15_CTS; regptr= &scc[card].addr->ctl[chan].reg; pl = SPL_CMB(); WRITEREG(regptr, 15, shadow[card][chan][15]); splx(pl); u.u_error = 0; /* Otherwise, /etc/hfc_ctl reports EINVAL!?! */ break; case TCSBRK: /* Send break (0.25 seconds of space condition) */ /* NEED: Code here */ break; case TCFLSH: /* NEED: Code here */ break; default: if (cmd>>8 != 'W') /* What-do I *look* like a window?!? */ eprintf("esccioctl(0x%x=cmd)??\n", cmd); u.u_error = EINVAL; } } /* end esccioctl() */ /* End z85230.c ])}*/ 0707070000020021451004440015130777760000010220600566611173200000700000012571escc.h/* {([ escc.h 1.6 - 11/24/94 11:18:43 * escc.h - Definitions for the z85230 UNIXpc combo card driver * Charles Green * * A/~B is mapped to address line 1, D/~C is mapped to address line 2. * So, 16-bit I/O will operate on the following in the low-order byte: * EXP_ADR(n)+0 channel B control register (RR0B/WR0B) * EXP_ADR(n)+2 channel A control register (RR0A/WR0A) * EXP_ADR(n)+4 channel B data register (FIFO) (RR8B/WR8B) * EXP_ADR(n)+6 channel A data register (FIFO) (RR8A/WR8A) * * In addition, combo card logic provides the following magic addresses: * EXP_ADR(n)+8 thru EXP_ADR(n)+14: (read only) "DSRRD" status bits * EXP_ADR(n)+16 thru EXP_ADR(n)+22: (write only) "LATCHWR" Sync Clock * EXP_ADR(n)+24 thru EXP_ADR(n)+30: (write) SRESET (read) ROMRD */ static char sccsid[] = "@(#)escc.h 1.6 11/24/94 Charles Green"; #define KERNEL 1 /* For sys/slot.h */ #define defined_io 1 /* For TCGETA et al */ #include /* Includes For FREAD et al */ #include /* For slots[] */ #include /* For TCGETA et al */ #include /* For STGET - where documented??? */ #include /* For TIOCGETP - where documented??? */ #include /* For struct tty */ #include /* For struct u */ #include /* For ENODEV */ #include /* For linesw[] */ #include /* For drv_int */ #include /* For min() */ #define CMB_ID 0x1000 /* This was in slots[0], but where documented?? */ #define CMB_INT 5 /* From schematics */ #define EXP_ADR(x) ((byte *)SLOT0 + ((x)<<18)) #define SPL_CMB() spl6() /* cmb.o 'nm' shows use of 'spl6' */ #define B 0 #define A 1 #ifndef __STDC__ #define volatile #endif typedef unsigned char byte; typedef volatile byte vbyte; typedef struct { byte unu; vbyte reg; /* Accessing bytes within shorts */ } regis; typedef struct { regis ctl[2], /* B and A Control registers */ dat[2], /* B and A Data FIFOs */ dsrrd[4], /* DSR bits (A=bit0, B=bit1) */ latchwr[4], /* Synchronous clocking */ reset[4]; /* Write = reset, read = ROM */ } combo; #define MAXCMB NSLOTS #define NCHANS 2 typedef struct { combo *addr; short type; short overruns[NCHANS]; /* Receiver overrun count */ short busy[NCHANS]; /* Whether Rx Int since last poll */ byte rr0[NCHANS]; /* To figure out what signals change */ short txinttim[NCHANS]; /* How long in BUSY state for output */ short txmisint[NCHANS]; /* How many Tx interrupts lost */ } scc_ctl; #define RR0_CTS 0x20 /* Clear to Send status */ #define RR0_DCD 0x08 /* Data Carrier Detect status */ #define RR0_TBE 0x04 /* Transmit Buffer Empty */ #define RR0_RCA 0x01 /* Receive Character Available */ #define RR1_ASY 0x70 /* Potential Special Receive Conditions */ #define RR1_FRM 0x40 /* Asynchronous Framing Error */ #define RR1_OVR 0x20 /* Receiver Overrun */ #define RR2_CHAN 0x08 /* Whether status-with-vector is re: A/B */ #define RR2_STAT 0x06 /* Mask for which interrupt status: */ #define RR2_TX 0x00 /* Transmitter empty (or not full) */ #define RR2_EXT 0x02 /* External / Status Change */ #define RR2_RX 0x04 /* Receiver not empty (or half full) */ #define RR2_SRC 0x06 /* Special Receive Condition (no IUS) */ #define WR0_RES 0x10 /* Reset External/Status Interrupts */ #define WR0_RTI 0x28 /* Reset Transmit Interrupt Pending */ #define WR0_RHI 0x38 /* Reset Highest Interrupt Under Service */ #define WR0_RER 0x30 /* Reset Error */ #define WR1_RIA 0x10 /* RX interrupt on "all" characters */ #define WR1_TIE 0x02 /* TX interrupt enable on empty FIFO */ #define WR1_SIE 0x01 /* Status Interrupt Enable */ #define WR3_RXE 0x01 /* Receiver Enable */ #define WR4_X16 0x40 /* 16X baud rate clock multiplier */ #define WR4_X32 0x80 /* 32X baud rate clock multiplier */ #define WR4_X64 0xc0 /* 64X baud rate clock multiplier */ #define WR4_ASY 0x04 /* Async mode, integral stop bits */ #define WR5_DTR 0x80 /* Data Terminal Ready assertion */ #define WR5_TXE 0x08 /* Transmitter Enable */ #define WR5_RTS 0x02 /* Request to Send assertion */ #define WR7P_ERE 0x40 /* Extended Read Enable */ #define WR7P_TFI 0x20 /* Transmit FIFO interrupt on empty */ #define WR7P_RFI 0x08 /* Receive FIFO interrupt on half full */ #define WR9_FHR 0xc0 /* Force Hardware Reset */ #define WR9_SIA 0x20 /* Software Interrupt Acknowledge enable */ #define WR9_MIE 0x08 /* Master Interrupt Enable */ #define WR11_XTL 0x80 /* Crystal between ~RTxC and ~SYNC */ #define WR11_RBR 0x40 /* Receive clocking from BR generator */ #define WR11_TBR 0x10 /* Transmit clocking from BR generator */ #define WR11_TRC 0x04 /* TRxC pin is output (handy for DEBUG) */ #define WR11_XBR 0x02 /* TRxC pin source from BR generator (DEBUG) */ #define WR14_BRE 0x01 /* Baud Rate Generator Enable */ #define WR14_CLK 0x02 /* Baud Rate Generator source from PCLK */ #define WR14_BRG 0x80 /* Set Source = BR Generator */ #define WR15_W7P 0x01 /* Select Write Register 7 Prime */ #define WR15_DCD 0x08 /* Enable Interrupt on DCD State Change */ #define WR15_CTS 0x20 /* Enable Interrupt on CTS State Change */ #define Z8530 0 /* SCC */ #define Z85130 1 /* ESCC */ #define Z85230 2 /* ESCC */ /* Note: The Combo card has two 2.4576 MHz crystals, one for each * channel. With a 10 MHz Z85230, we could replace these with 7.3728 MHz * to get 57600, 76800, and even 115200 bps... */ #define SCCBRG(x) (76800/(x)-2) /* Stock combo card rates */ /* ])} */ 0707070000020020771006440015130777760000011055640566611234700001100000016666z85230.oR.ؔl7 ,.text,T .data,,b@.bssNV n . N^NuNV/ /$n$./. / a$.$nN^NuNV nN^NuNV/ $n/. / a$nN^NuHELLO from esccstart()! NVHynNN^Nuesccproc(0x%x) NVH?8&n$. +FxȀ+F6C2A0HЀ,ܰR~ e Ѐ0;N$2k>`zk>0+>@fhEN*JgJk"f8JgB0+$+BHHA/ pNXOJ@mHx(/a`+?f2A0HЀ"@ZI00HA|Ѐ>0jd4`4*JBgjk >02Hҁ @BpSB Bg RRQ`~k>k>2H0H$ԀEp2(gl2(`0k>k@>2H0H$ԀEp2(g:2(N*2(H8@/ Hx/a/N`/HyNpLN^NuWatchdog reset, status2 0x%x RR2_SRC: Framing Error 0x%x=RR1 EEK! No t_rbuf!? EEK!! No t_rbuf!? 0x%x=rr0diff unknown status 0x%x NVH?<,<BnBG4|"F-QBRyp y@poX2n/ HyN0HAp HxHx "nHia~0A p|BypHx"nHia=@@:E0HЀ"nK6&C0PPO0.@ @gn J@gB`: @gn @f,Hx/ a"2pPOf =|`"gHyNXO`0g0HЀ"@RqhHx0/ a`2A/ HyNPO0HЀ(@"FZLE&Jf4HyNXOgf`zHyNXO`j=j nB0*gNtSj jg>Jjf0+BHH/ C qNXOJg4*"ҒB0* Af4|0HЀ"@Rqh `4|+>g Hx(/ aPO+?g HkNXOk>B/ a$`4|BD/ a4B@"F1P@8@XO& gP8 gk>+?g:/ NXO`.k>+?g Hx2k@/ NHx/ N& gxgHx`Hx/ aPOJDf8L/ Hy NPO"FPHx/ a`vƮ/HyNPOHx8/ aPOJngBnv܃RG0Glm0 HLB/ a`8B/ N 0HЀ(GG(@-LZN4C&Jg>8*, DB0**g&0**Sj*J@g(ng 0)SiJ@f*BHHA/ pN8B/ NPO0HЀBu RC CoRE0ElmHx(nRL/ HyN#r`ByLg$4A/ 4B/ 2q>/ Hy N`(RA AoRB0B 9lЀnHxHyNL N^NuNVH>8&nB@+F:E8D2A0HЀ&ְR4+:B@JBD|LĆ0+:@2+:F/Hx/IN+; gJ0+:@|EЀ2/Hx /N0+:@Ѐ2H2@/ Hx /N2H0HҀAp0+;000H2@/ Hx/EN2+:A0|0†0+:@H|/Hx/NL|N^NuNVH<88. :E4B0Elo `Z2(A0P,?f0H&փ$@A8BhBh/ N)|.DF֒RN(HxHx /GNHxHx/N0HԀEp2(/ a2 (2 ( 2(H2@/ Hx/NHxhHx/NHxHx/N .(Hx /N/NN(.f,,?fl>Hx/ NPO,?gl>`l>/NXO,BHHA/ pNLG2*A0PN*-?gm@>HxHmNPO-?fm>/N8G8G& փ$ԳHRN*BHx/ENBHx/NBHx/N$.NGHA8XOJPg0P// 2F/ Hy~N24H Ѐ AAJPg0P//2F/ HyN-BHHA/ pNm>Ln6 Tghn D g( Tg` TgF Tg>` TgLn Tg Tg` Xg tg`N(/aL/N`Jg0H2HЁAp0 `0H2HЁAp00A4H&փְRN(0HԀAp0(H2@/ Hx/a$/NB9` ~Wg/Hy|NLN^Nu@(#)z85230.c 1.16 11/25/94 Charles Green@(#)escc.h 1.6 11/24/94 Charles Green,;~~>( 8`    R f!6 P X fl#x    JP| v$$%&.4V\#      &:$T!v !  '&.   !)   F  d         $  * 0 6  R  X d  j p v       *  +  " (- 2  >  h n v*   .   B    * ,  N  b0 h x  !61V!h   1"!. BRt!   . X l  6Xh!    !**.filegz85230.cSccsid,sccsidU$txfifosz|esccprocsccshadowpnopollpcmb_ttyncardslorbitesccpollpollargrcmb_intratessetmodes .text,.data,.bss.WRITEREGREADREG08READREGLeprintfspl6lineswsplxesccint,printfwakeupsignalttyflushtimeoutesccinitslotsuset_int8 Dclr_intesccopen ttinitsleepNesccreadX>bttiocomlgcc2_compiled.__gnu_compiled_cesccstartWRITEREG0esccreleaseuntimeoutescccloseesccwriteesccioctl0707070000020026051006660015130777760000010166030566611174500001600000000064makefile.esccz85230.o: z85230.c escc.h gcc -O -Wall -c z85230.c 0707070000020346041006440015130777760000011524220566615737700001400000014064Readme.EsccReadme.Escc ESCCOMBO Instructions Charles Green _______________________________________________________________________________ NOTE: This document describes a procedure which has made my computer system more useful and productive. The information is made available for the benefit of those able and willing to use it. Because I cannot be aware of others' circumstances, needs or abilities, nor of problems which have not yet been experienced in testing, I am not liable for any damage resulting from actions taken by others in an attempt to duplicate this project. At a minimum, the user is strongly urged to perform a complete backup of any system to which this modification is performed, because the device driver contained within the package was written without the benefit of complete documentation of the system in which it operates, and a malfunction resulting in the loss of any and all data is, while not deemed likely, entirely possible. _______________________________________________________________________________ This package contains an installable device driver for the AT&T UNIXpc (7300/3b1) which is designed to work with a modified Combo Card containing a Zilog Z85230 Enhanced Serial Communications Controller (ESCC) in place of the stock Z8530 SCC (or clone, typically from AMD). Because the ESCC contains an eight-character receive FIFO and four-character transmit FIFO, this can reduce the interrupt load to the CPU by up to 75 percent, allowing the use of 38400 bps interface speed. Other benefits of the driver include: - Source code. (Please pass any modifications/enhancements/fixes back to charles@nybble.sterling.va.us so that others can benefit.) - My compiler produces a smaller executable (0x2000, or two kernel pages) than that for the cmb.o driver (0x3000, or three pages). Current (version 1.16) drawbacks include, but are not necessarily limited to: - Not all ioctl()s are yet implemented; in particular, BREAK handling and input/output flushing are still missing. - At times, the driver experiences conditions in which a transmit interrupt is not received from the chip when expected. A timer has been added to detect this condition and recover from it. These instances are reported to the error logger as "lost n Tx interrupts" when the port is closed. - Very rarely, the driver is unable to service an outstanding interrupt from the controller. The current workaround for this condition involves a total reset of the affected chip; however, this is not done in a graceful fashion with respect to the operating system, and renders the card unusable until the next system reboot. This anomaly is accompanied with printing of the message "Watchdog reset, status2 0x??". If this condition should arise, please Email the complete text of this message (I need to know what the ?? value is) to charles@nybble.sterling.va.us. As of this writing (November 1994 A.D.), only the revision 'F' card has been tested with this modification. All tested revision 'E' cards have failed to operate with the Z85230, and a rev 'G' board (which should match the schematics in the AT&T UNIXpc Reference Manual) has not been available for testing (let me know if you have one for sale or trade). I (charles@nybble.sterling.va.us) would like to hear from those who succeed in getting non-F revision boards to work, so that I can augment this distribution and benefit more users. The hardware modification consists of two parts: Removing the stock SCC chip and replacing with the ESCC (one known source of the Z8523010PSC is Newark Electronics; the Z85130 should also work, but I have been unable to obtain one for testing), and removing the two 100K ohm resistors which parallel the crystal oscillators which drive the baud rate clock (R9 and R10). It is assumed that the user is familiar with the appropriate techniques to safely remove and re-install the components. Also, be advised that this procedure may void any warranty you have on this equipment. The software modification involves replacing the 'cmb.o' driver, typically found in /etc/lddrv, with the 'z85230.o' driver, updating the /etc/master file to allocate an unused major device number, creating the special files, typically in the /dev directory, to access the driver, and updating the /etc/lddrv/drivers file to automatically load the driver at system boot time. These steps are carried out by the Install script, which is run by the UNIXpc User Agent when the software is installed. The 'cmb.o' driver should then be unloaded and the 'z85230.o' driver loaded, either manually or as the result of a system reboot. Finally, it is necessary to locate all places where the /dev/tty0?? special file is referenced, and replace the references with /dev/ttyz??, where the first '?' is replaced by the number of the card (0-7) and the second '?' is replaced by the port on the card (0 or 1). Likely places where the user would want to perform this replacement are the /etc/inittab file (for dialup login sessions), scripts run in the /etc/daemons directory (perhaps to enable hardware flow control), /usr/lib/uucp/L.sys or /usr/lib/uucp/Systems file (for UUCP packages - Taylor UUCP configuration files may be located elsewhere), and other places (such as configuration files for communications programs like 'pcomm'). Due to the wide assortment of packages and configurations, no attempt is made by the installation program to perform this update. In order to reduce the amount of work involved in reconfiguration of the system to make use of the new device driver, the user may instead prefer to remove the existing /dev/tty0?? files and replace them with files making use of the new device driver major number. If this is done, please note that the least-significant-bit of the minor device number is 'backward' from that which might be expected, in order to optimize the coding of the driver because of the indexing method used to access the control registers of the ESCC. That is, the devices accessed under the cmb.o driver as tty001 and tty002 will have minor device numbers of 1 and 0, respectively, under the z85230.o driver. 0707070000020346041006440015130777760000011524220566615737700001300000000000TRAILER!!!ting the /etc/lddrv/drivers file to automatically load the driver at system boot time. These steps are carried out by the Install script, which is run by the UNIXpc User Agent when the software is installed. The 'cmb.o' driver should then be unloaded and the 'z85230.o' driver loaded, either manually or as the result of a system reboot. Finally, it is necessary to locate all places where the /dev/tty0?? special file is referenced, and replace the references with /dev/ttyz??, where the first '?' is replaced by the number of the card (0-7) and the second '?' is replaced by the port on the card (0 or 1). Likely places where the user would want to perform this replacement are the /etc/inittab file (for dialup login sessions), scripts run in the /etc/daemons directory (perhaps to enable hardware flow control), /usr/lib/uucp/L.sys or /usr/lib/uucp/Systems file (for UUCP packages - Taylor UUCP configuration files may be located elsewhere), and other places (such as configuration files for communications programs like 'pcomm'). Due to the wide assortment of packages and configurations, no attempt is made by the installation program to perform this update. In order to reduce the amount of work involved in reconfiguration of the system to make use of the new device driver, the user may instead prefer to remove the existing /dev/tty0?? files and replace them with files making use of the new device driver major number. If this is done, please note that the least-significant-bit of the minor device number is 'backward' from that which might be expected, in order to optimize the coding of the driver because of the indexing method used to access the control registers of the ESCC. That is, the devices accessed under the cmb.o driver as tty001 and tty002 will have minor device numbers of 1 and 0, respectively, under the z85230.o driver. 0707070000020346041006440015130777760000011524220566615737700001300000000000TRAILER!!!ting the /etc/lddrv/drivers file to automatically load the driver at system boot time. These steps are carried out by the Install script, which is run by the UNIXpc User Agent when the software is installed. The 'cmb.o' driver should then be unloaded and the 'z85230.o' driver loaded, either manually or as the result of a system reboot. Finally, it is necessary to locate all places where the /dev/tty0?? special file is referenced, and replace the references with /dev/ttyz??, where the first '?' is replaced by the number of the card (0-7) and the second '?' is replaced by the port on the card (0 or 1). Likely places where the user would want to perform this replacement are the /etc/inittab file (for dialup login sessions), scripts run in the /etc/daemons directory (perhaps to enable hardware flow control), /usr/lib/uucp/L.sys or /usr/lib/uucp/Systems file (for UUCP packages - Taylor UUCP configuration files may be located elsewhere), and other places (such as configuration files for communications programs like 'pcomm'). Due to the wide assortment of packages and configurations, no attempt is made by the installation program to perform this update. In order to reduce the amount of work involved in reconfigur